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Structure for containing desiccant

Abstrict

A hermetically sealed area includes a substrate having microelectronics thereon. A desiccant is operatively disposed within the hermetically sealed area. An equipotential region is substantially maintained around the desiccant.

Claims

What is claimed is:

1. A structure for containing desiccant in at least one of a wafer level packaged device and a die level packaged device, the structure comprising: a substrate; a first metal layer disposed on the substrate within a predetermined area; a second metal layer defining the predetermined area; a dielectric layer disposed on the first metal layer; a desiccant disposed on the dielectric layer; a permeable membrane disposed on the desiccant and the dielectric layer, wherein the permeable membrane surrounds the desiccant, the dielectric layer, and the first metal layer, and is within the predetermined area; and a plurality of metal traces disposed on the permeable membrane.

2. The structure as defined in claim 1 wherein the substrate is at least one of single crystal silicon, polycrystalline silicon, silicon oxide containing dielectric substrates, alumina, sapphire, ceramic, glass, silicon wafers, germanium wafers, gallium arsenide wafers, and mixtures thereof.

3. The structure as defined in claim 1 wherein the first metal layer, the second metal layer, and the metal traces are held substantially equi-potential to a potential of at least one of the wafer and the die.

4. The structure as defined in claim 1 wherein the first metal layer is at least one of gold, aluminum, tantalum, platinum, iridium, palladium, rhodium, nickel chromide, doped polysilicon, and mixtures thereof.

5. The structure as defined in claim 1 wherein the second metal layer is at least one of gold, aluminum, tantalum, platinum, iridium, palladium, rhodium, nickel chromide, doped polysilicon, and mixtures thereof.

6. The structure as defined in claim 1 wherein the plurality of metal traces is at least one of gold, tantalum, aluminum, platinum, iridium, palladium, rhodium, nickel chromide, and mixtures thereof.

7. The structure as defined in claim 1 wherein the dielectric layer comprises at least one of silicon oxide and silicon nitride.

8. The structure as defined in claim 1 wherein the permeable membrane comprises at least one of a polymeric material and a porous ceramic material.

9. The structure as defined in claim 8 wherein the polymeric material is a flexible material.

10. The structure as defined in claim 1 wherein the desiccant is at least one of silica gel, calcium oxide, calcium sulfate, and molecular sieves.

11. A structure for containing desiccant in a wafer level packaged device, the structure comprising: a substrate; a metal layer disposed on the substrate; a permeable membrane disposed on the metal layer, the permeable membrane having a desiccant dispersed therein; and a plurality of metal traces disposed on the permeable membrane.

12. The structure as defined in claim 11 wherein the substrate is at least one of single crystal silicon, polycrystalline silicon, silicon oxide containing dielectric substrates, alumina, sapphire, ceramic, glass, silicon wafers, germanium wafers, gallium arsenide wafers, and mixtures thereof.

13. The structure as defined in claim 11 wherein the metal layer and the plurality of metal traces are held substantially equi-potential to a potential of the wafer.

14. The structure as defined in claim 11 wherein the metal layer is at least one of gold, aluminum, tantalum, platinum, iridium, palladium, rhodium, nickel chromide, doped polysilicon, and mixtures thereof.

15. The structure as defined in claim 11 wherein the plurality of metal traces is at least one of gold, aluminum, tantalum, platinum, iridium, palladium, rhodium, nickel chromide, and mixtures thereof.

16. The structure as defined in claim 11 wherein the permeable membrane is at least one of a polymeric material and a porous ceramic material.

17. The structure as defined in claim 11 wherein the desiccant is at least one of silica gel, calcium oxide, calcium sulfate, and molecular sieves.

18. A method for making a structure for containing desiccant in at least one of a wafer level packaged device and a die level packaged device, comprising the steps of: depositing a predetermined area-defining metal layer on a substrate; depositing a ground plane layer within the predetermined area; depositing a dielectric layer on the ground plane layer; depositing a desiccant on the dielectric layer; depositing a permeable membrane on the desiccant and the dielectric layer, wherein the permeable membrane surrounds the desiccant, the dielectric layer, and the ground plane layer, and is within the predetermined area; and depositing a plurality of metal traces on the permeable membrane.

19. The method as defined in claim 18 wherein the depositing of the metal layer, the ground plane layer, the dielectric layer and the plurality of metal traces is accomplished by at least one of physical vapor deposition, co-sputtering, reactive sputtering, reactive co-sputtering, evaporation, pulsed laser deposition, ion beam methods, electronic-beam techniques, chemical vapor deposition, plasma enhanced chemical vapor deposition, atomic layer deposition, angle deposition, and combinations thereof.

20. The method as defined in claim 18 wherein the depositing of the permeable membrane is accomplished by at least one of spin coating, extrusion, lamination, dipping, spray coating, screen printing and chemical vapor deposition.

21. The method as defined in claim 18 further comprising the steps of: patterning the ground plane layer; patterning the predetermined area-defining metal layer; patterning the dielectric layer; patterning the desiccant; patterning the permeable membrane; and patterning the plurality of metal traces.

22. The method as defined in claim 21 wherein the patterning steps are accomplished by one of photolithography, photo and etch, photoresist lift-off, imprinting, and laser ablation.

23. The method as defined in claim 18 wherein the substrate is at least one of single crystal silicon, polycrystalline silicon, silicon oxide containing dielectric substrates, alumina, sapphire, ceramic, glass, silicon wafers, germanium wafers, gallium arsenide wafers, and mixtures thereof.

24. The method as defined in claim 18 wherein the predetermined-area defining metal layer and the metal traces are held substantially equi-potential to a potential of at least one of the wafer and the die.

25. A structure for containing desiccant in a wafer level packaged device produced by the process of claim 18.

26. A method for making a structure for containing desiccant in at least one of a wafer level packaged device and a die level packaged device, comprising the steps of: depositing a metal layer on a substrate; depositing a permeable membrane on the metal layer, the permeable membrane having a desiccant dispersed therein; and depositing a plurality of metal traces on the permeable membrane.

27. A structure for containing desiccant in at least one of a wafer level packaged device and a die level packaged device produced by the process of claim 26.

28. The method as defined in claim 26 wherein the depositing of the metal layer and the plurality of metal traces is accomplished by physical vapor deposition, co-sputtering, reactive sputtering, reactive co-sputtering, evaporation, pulsed laser deposition, ion beam methods, electronic-beam techniques, chemical vapor deposition, plasma enhanced chemical vapor deposition, atomic layer deposition, angle deposition, and combinations thereof.

29. The method as defined in claim 26 wherein the depositing of the permeable membrane is accomplished by at least one of spin coating, extrusion, lamination, dipping, spray coating, screen printing and chemical vapor deposition.

30. The method as defined in claim 26 further comprising the step of patterning the plurality of metal traces.

31. The method as defined in claim 30 wherein the patterning step is accomplished by photolithography, photo and etch, photoresist lift-off, imprinting, and laser ablation.

32. The method as defined in claim 26 wherein the metal layer and the plurality of metal traces are held substantially equi-potential to a potential of at least one of the wafer and the die.

33. The method as defined in claim 26 wherein the desiccant is homogeneously dispersed throughout the permeable membrane.

34. An integrated circuit, comprising: a hermetically sealed area having the integrated circuit operatively disposed therein; and a structure within the hermetically sealed area for containing a desiccant, the structure comprising: a substrate; a first metal layer disposed on the substrate within a predetermined area; a second metal layer defining the predetermined area; a dielectric layer disposed on the first metal layer; a desiccant disposed on the dielectric layer; a permeable membrane disposed on the desiccant and the dielectric layer, wherein the permeable membrane surrounds the desiccant, the dielectric layer, and the first metal layer, and is within the predetermined area; and a plurality of metal traces disposed on the permeable membrane.

35. An integrated circuit, comprising: a hermetically sealed area having the integrated circuit operatively disposed therein; and a structure within the hermetically sealed area for containing a desiccant, the structure comprising: a substrate; a metal layer disposed on the substrate; a permeable membrane disposed on the metal layer, the permeable membrane having a desiccant dispersed therein; and a plurality of metal traces disposed on the permeable membrane.

36. A method of using a structure for containing desiccant, the method comprising the step of: hermetically sealing the structure for containing desiccant to a substrate having microelectronics thereon, the structure for containing desiccant comprising: a second substrate; a metal layer disposed on the second substrate; a permeable membrane disposed on the metal layer, the permeable membrane having a desiccant dispersed therein; and a plurality of metal traces disposed on the permeable membrane.

37. A hermetically sealed area, comprising: a substrate having microelectronics thereon; a desiccant operatively disposed within the hermetically sealed area; and means for substantially maintaining an equipotential region around the desiccant.

38. A structure for containing desiccant in at least one of a wafer level packaged device and a die level packaged device, the structure comprising: a substrate; a metal layer disposed on the substrate; a dielectric layer disposed on the metal layer; a desiccant disposed on the dielectric layer; a permeable membrane disposed on the desiccant and the dielectric layer, wherein the permeable membrane surrounds the desiccant, the dielectric layer, and the metal layer; and a plurality of metal traces disposed on the permeable membrane.

39. The structure as defined in claim 38 wherein the metal layer and the metal traces are held substantially equi-potential to a potential of at least one of the wafer and the die.

40. A method for making a structure for containing desiccant in at least one of a wafer level packaged device and a die level packaged device, comprising the steps of: depositing a metal layer on a substrate; depositing a dielectric layer on the metal layer; depositing a desiccant on the dielectric layer; depositing a permeable membrane on the desiccant and the dielectric layer, wherein the permeable membrane surrounds the desiccant, the dielectric layer, and the metal layer; and depositing a plurality of metal traces on the permeable membrane.

41. The method as defined in claim 40 further comprising the step of holding the metal layer and the metal traces at a potential that is substantially equi-potential to a potential of at least one of the wafer and the die.

42. The method as defined in claim 40 wherein the permeable membrane comprises a flexible material.

43. The method as defined in claim 42 wherein the flexible material comprises at least one of a polymeric material and a porous ceramic material.

44. The method as defined in claim 43 wherein the polymeric material comprises a photoresist comprising at least one of poly(methyl methacrylate) and photosensitive polyimide.

45. The method as defined in claim 43 wherein the porous ceramic material comprises at least one of porous aluminum oxide and porous silicon dioxide.

46. The method as defined in claim 40 further comprising the step of holding the metal layer and the metal traces at ground potential.

Description

BACKGROUND

[0001] Embodiments of the present invention relate generally to microelectronics, and more particularly to a structure for containing desiccant in a wafer/die level packaged device.

[0002] Electronic devices generally function more efficiently if they are protected from ambient environments. Various packaging devices and methods for packaging electronic devices are known in order to keep the devices in working condition. These devices and methods often incorporate some sort of desiccant material within the package to absorb any moisture.

[0003] Many desiccating materials contain mobile ions. Generally, mobile ions are not compatible with microelectronics. Chemical electromigration of the desiccating material's mobile ions may in some instances lead to failure of the microelectronics.

SUMMARY

[0004] A hermetically sealed area is provided, including a substrate having microelectronics thereon. A desiccant is operatively disposed within the hermetically sealed area. An equipotential region is substantially maintained around the desiccant.

BRIEF DESCRIPTION OF THE DRAWINGS

[0005] Objects, features and advantages will become apparent by reference to the following detailed description and drawings, in which like reference numerals correspond to similar, though not necessarily identical components. For the sake of brevity, reference numerals having a previously described function may not necessarily be described in connection with subsequent drawings in which they appear.

[0006] FIG. 1 is a cross-sectional perspective view of an embodiment of a structure for containing desiccant;

[0007] FIG. 2 is a cross-sectional view of an embodiment of a structure for containing desiccant;

[0008] FIG. 3 is a cross-sectional view of a wafer level packaged device including the embodiment of FIG. 2;

[0009] FIG. 4 is a cross-sectional view of an embodiment of a structure for containing desiccant showing an embodiment of the desiccant dispersed throughout an embodiment of the permeable membrane; and

[0010] FIG. 5 is a cross-sectional view of a wafer level packaged device including the embodiment of FIG. 4.

DETAILED DESCRIPTION

[0011] As will be described further hereinbelow, in an embodiment of a structure for containing a desiccant, an equipotential cage is formed around the desiccant. It is believed that this generally advantageously removes the driving forces for mobile ion migration towards any associated microelectronics/electronic circuitry (e.g. an integrated circuit). As such, the likelihood of destroying and/or degrading the microelectronics may be substantially decreased. It is to be understood that the structure for containing desiccant may advantageously capture water vapor and/or moisture. Further, an embodiment of the present invention provides a flexible porous membrane, which may advantageously deform to allow volume expansion as moisture is adsorbed into the desiccant, as well as volume reduction as moisture is expelled from the desiccant.

[0012] Referring now to FIG. 1 a structure for containing desiccant according to an embodiment of the present invention is generally designated as 10. The structure 10 for containing desiccant includes a substrate 12; a first metal layer 14 thereon; a second metal layer 16 defining a predetermined area 13 on the substrate 12; a dielectric layer 18 disposed on the first metal layer 14; a desiccant layer 20 disposed on the dielectric layer 18; a permeable membrane 22 overlaying and surrounding the desiccant layer 20 the dielectric layer 18 and the first metal layer 14; and metal traces 24 disposed on the permeable membrane 22.

[0013] Some non-limitative examples of suitable substrate 12 materials include single crystal silicon, polycrystalline silicon, silicon oxide containing dielectric substrates, alumina, sapphire, ceramic, glass, silicon wafers, and/or mixtures thereof. In an embodiment, a silicon wafer was chosen as the substrate 12.

[0014] The method for making the structure 10 for containing desiccant 20 according to an embodiment of the present invention includes the step of depositing the first metal layer 14 within a predetermined area 13 on the substrate 12. It is to be understood that any suitable metal may be used for the first metal layer 14. Examples of suitable metals for the first metal layer 14 include, but are not limited to gold, aluminum, tantalum, platinum, iridium, palladium, rhodium, nickel chromide, doped polysilicon, and/or mixtures thereof.

[0015] In an embodiment, the first metal layer 14 has a thickness ranging between about 0.2 .mu.m and about 10 .mu.m.

[0016] In an embodiment, the first metal layer 14 the second metal layer 16 and the metal traces 24 are held substantially equi-potential to the wafer and/or die and/or general region of the wafer/die, depending on whether a wafer level packaged device or a die level packaged device is being formed. This substantially eliminates any potential difference or electric field difference. It is to be understood that the first metal layer 14 may form a ground plane layer under the desiccant 20. It is to be understood that the first metal layer 14 the second metal layer 16 and the metal traces 24 may be held at ground potential.

[0017] It is contemplated that any suitable deposition technique may be used to deposit the first metal layer 14 second metal layer 16 dielectric layer 18 desiccant 20 and the permeable membrane 22. Some deposition techniques include, but are not limited to physical vapor deposition (PVD) (PVD includes, for example, co-sputtering, reactive sputtering, reactive co-sputtering, evaporation, pulsed laser deposition, ion beam methods), electronic-beam deposition techniques, chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD), atomic layer deposition (ALD), angle deposition (for example glancing angle deposition (GLAD)), and/or combinations thereof. In an embodiment, the metal layers 14 16 are deposited by one of PVD, electronic-beam techniques and CVD, the dielectric layer 18 (generally an inorganic dielectric layer 18) is deposited by one of CVD and PECVD, and the permeable membrane 22 is deposited by one of spin coating, extrusion, lamination, dipping, spray coating, screen printing and CVD.

[0018] In an embodiment, the first metal layer 14 may optionally be patterned using standard photolithography techniques, followed by etching processes to remove any part of the metal layer not covered by the pattern. Suitable etching techniques include plasma etching and wet chemistry etching, depending on the metal used.

[0019] The method of an embodiment optionally includes the step of depositing a second metal layer 16 on the substrate 12 such that it defines a predetermined area 13 in which the first metal layer 14 (and the various other layers) is (are) deposited. The second metal layer 16 has a thickness ranging between about 0.2 .mu.m and about 10 .mu.m. Some non-limitative examples of the second metal layer 16 include gold, aluminum, tantalum, platinum, iridium, palladium, rhodium, nickel chromide, and/or mixtures thereof.

[0020] Referring now to FIG. 2 in an embodiment, the first metal layer 14 may be deposited on the substrate 12 without the second metal layer 16 (shown in phantom) being deposited. It is to be understood that in this embodiment, the dielectric layer 18 the desiccant layer 20 the permeable membrane 22 and metal traces 24 are deposited on and/or over metal layer 14.

[0021] An embodiment of the method further includes the step of depositing the dielectric layer 18 on the first metal layer 14. It is to be understood that any suitable dielectric material may be chosen. In an embodiment, the dielectric layer 18 may be at least one of non-porous silicon nitride and/or silicon oxide. It is to be understood that if there is a large difference in ion concentration from one side of the structure 10 for containing desiccant 20 to the other side, a dielectric layer 18 may be desirable to act as a diffusion barrier. Further, the dielectric layer 18 may protect the desiccant layer 20 from the first metal layer 14. In an embodiment, the dielectric layer 18 has a thickness ranging between about 500 Angstroms and about 30 .mu.m.

[0022] It is to be understood that the dielectric layer 18 may be patterned after it is deposited. Any suitable patterning technique may be used as described herein.

[0023] An embodiment of the method further includes the step of depositing the desiccant layer 20 on the dielectric layer 18. It is to be understood that any suitable desiccant material may be used. Some non-limitative examples of the desiccant material include, but are not limited to silica gel, calcium oxide, calcium sulfate, molecular sieves, and/or mixtures thereof. One non-limitative example of a suitable desiccant material is available commercially under the tradename HICAP 2000 from Cookson Electronics Inc. located in Alpharetta, Ga.

[0024] The desiccant layer 20 may be deposited using any suitable deposition technique. Further, the desiccant layer 20 may also be patterned using any suitable technique.

[0025] The method of making the structure 10 for containing desiccant 20 according to an embodiment of the present invention further includes the step of depositing a permeable membrane 22 over the desiccant layer 20 the dielectric layer 18 and the substrate 12.

[0026] In one embodiment of the structure 10 that includes the second metal layer 16 the permeable membrane 22 is deposited such that it covers and surrounds the desiccant layer 20 the dielectric layer 18 and the first metal layer 14 and is contained within the predetermined area 13 (shown in phantom in FIG. 2) defined by the second metal layer 16. In an alternate embodiment of the structure 10 that does not include the second metal layer 16 the permeable membrane 22 is deposited such that it covers and surrounds the desiccant layer 20 the dielectric layer 18 and the first metal layer 14.

[0027] It is to be understood that the permeable membrane 22 may be made of any suitable material, including, but not limited to a flexible polymeric material and a porous ceramic material. In an embodiment, membrane 22 is formed from a flexible polymeric material, such as, for example, photoresist materials. Other non-limitative examples of the flexible polymeric material include, but are not limited to poly(methyl methacrylate), polyesters, polycarbonates, polyimides and/or photosensitive polyamide, and/or mixtures thereof. One suitable photoresist material is commercially available under the tradename SU-8 from MicroChem, Inc. (previously Microlithography Chemical Corp.) in Newton, Mass. and from Gerstel SA in Tel-Aviv, Israel.

[0028] The flexibility of the permeable membrane 22 may advantageously allow the permeable membrane 22 to deform to allow volume expansion as moisture is absorbed into the desiccant layer 20 as well as to allow volume reduction as moisture is expelled from the desiccant layer 20.

[0029] In some instances, the use of a non-flexible porous ceramic permeable membrane 22 may be advantageous. Non-limitative examples of the porous ceramic material include, but are not limited to porous aluminum oxide and/or porous silicon dioxide.

[0030] The permeable membrane 22 may have a thickness ranging between about 500 Angstroms and about 30 .mu.m. Also, the permeable membrane 22 may be patterned using any suitable technique as described herein.

[0031] It is to be understood that the materials chosen for the permeable membrane 22 and the desiccant layer 20 may be selected based on the desired end use for the structure 10. For example, an embodiment of the structure 10 for containing desiccant 20 may advantageously be used to capture water vapor. In this non-limitative example, any of the above listed permeable membranes 22 and desiccant 20 materials may be used.

[0032] The structure 10 for containing desiccant 20 further includes metal traces 24 deposited on the permeable membrane 22.

[0033] It is to be understood that the metal traces 24 may be made of any suitable metal. Some non-limitative examples of metals selected for the metal traces 24 include, but are not limited to gold, aluminum, tantalum, platinum, iridium, palladium, rhodium, nickel chromide, doped polysilicon and/or mixtures thereof. The metal traces 24 may be deposited using any suitable deposition technique as previously described. Still further, the metal traces 24 may be patterned by any suitable technique. In an embodiment, the metal traces 24 have a thickness ranging between about 0.2 .mu.m and about 10 .mu.m.

[0034] Referring now to FIG. 3 it is contemplated that the structure 10 according to an embodiment of the present invention forms an equipotential cage/region around the desiccant layer 20 thus substantially preventing ion migration from the desiccant layer 20 toward any associated microelectronics/electronic circuitry 26 30. Examples of microelectronics/electronic circuitry 26 30 include, but are not limited to integrated circuits 30 micro-electro mechanical systems (MEMS) 26 etc.

[0035] A wafer level packaged device 11 includes an integrated circuit (IC) 30 and/or a micro-electro mechanical system (MEMS) 26 disposed on a suitable microelectronics substrate 12'.

[0036] It is to be understood that the substrate 12' may be any suitable substrate 12'. Some non-limitative examples of the substrate 12' include single crystal silicon, polycrystalline silicon, silicon oxide containing dielectric substrates, alumina, sapphire, ceramic, glass, silicon wafers, germanium wafers, and/or gallium arsenide wafers, and/or mixtures thereof.

[0037] In an embodiment of the present invention, the IC 30 or MEMS 26 disposed on the substrate 12' may be operatively disposed within a hermetically sealed area 34. Further, the structure 10 for containing desiccant 20 may also be operatively disposed within the hermetically sealed area 34. It is contemplated that bonds and/or seals 28 may be used to hermetically seal the substrate 12 of the structure 10 for containing desiccant 20 to the substrate 12' having the integrated circuit 30 and/or MEMS 26 thereon. The structure 10 may substantially remove the driving force for chemical electromigration of the mobile ions in the desiccant layer 20 toward the IC 30 and/or MEMS 26 by providing an embodiment of the equipotential cage/region described herein around the desiccant 20.

[0038] A structure according to another embodiment of the present invention is generally designated as 10', as depicted in FIG. 4. The structure 10' includes substrate 12 metal layer 14 a permeable membrane 32 having desiccant 20 dispersed therein, and metal traces 24.

[0039] The method for making the structure 10' according to another embodiment includes the step of depositing the metal layer 14 on the substrate 12. Any suitable deposition technique may be selected to deposit the metal layer 14 on the substrate 12. Further, the metal layer 14 may be patterned using any suitable patterning technique.

[0040] The method for making the structure 10' for containing desiccant 20 according to another embodiment further includes the step of depositing a permeable membrane 32 with desiccant 20 dispersed therein on the metal layer 14. It is to be understood that the desiccant 20 may be substantially homogenously dispersed throughout the permeable membrane 32. Some examples of the permeable membrane 32 with desiccant 20 dispersed therein include, but are not limited to a polymeric material having therein silica gel, calcium oxide, molecular sieves, and/or calcium sulfate, and/or a porous ceramic material having therein silica gel, calcium oxide, molecular sieves, and/or calcium sulfate. One permeable membrane 32 with desiccant 20 dispersed therein is commercially available under the tradename STAYDRY from Cookson Electronics in Alpharetta, Ga.

[0041] The permeable membrane 32 with desiccant 20 therein may be deposited using any suitable deposition technique, including, but not limited to spin coating, spray coating, extrusion, lamination, dipping, spray coating, CVD and screen printing. Additionally, the permeable membrane 32 with desiccant 20 therein may optionally be patterned using any suitable patterning technique, including, but not limited to etching (including photo and etch), laser ablation, imprinting, and photoresist lift-off.

[0042] The method according to an embodiment further includes the step of depositing a plurality of metal traces 24 on the permeable membrane 32. Any suitable deposition technique, as previously described, may be used. Further, some non-limitative examples of suitable metals for the metal traces 24 are gold, aluminum, tantalum, alloys thereof and/or mixtures thereof.

[0043] In an embodiment, the metal traces 24 may also be patterned by any suitable patterning technique.

[0044] It is contemplated that the structure 10' according to another embodiment substantially encloses the desiccant 20 within an equipotential cage/region.

[0045] Another embodiment of the wafer level packaged device 11 including an integrated circuit (IC) 30 and/or a micro-electro mechanical system (MEMS) 26 disposed on a suitable microelectronics substrate 12', is depicted in FIG. 5.

[0046] In an embodiment, the IC 30 or MEMS 26 disposed on the substrate 12' may be operatively disposed within a hermetically sealed area 34. Further, the structure 10' for containing desiccant 20 may also be operatively disposed within the hermetically sealed area 34. It is contemplated that bonds and/or seals 28 may be used to hermetically seal the substrate 12 of the structure 10' for containing desiccant 20 to the substrate 12' having the integrated circuit 30 and/or MEMS 26 thereon. The structure 10' may substantially remove the driving force for chemical electromigration of the mobile ions in the desiccant layer 20 toward the IC 30 and/or MEMS 26 by providing an embodiment of the equipotential cage/region described herein around the desiccant 20.

[0047] A method of using the structure 10 10' according to embodiments of the present invention includes the step of hermetically sealing the structure 10 10' for containing desiccant 20 to a substrate 12' having microelectronics 26 30 (non-limitative examples of which include an IC 30 and/or MEMS 26) thereon.

[0048] In an alternate embodiment, the structure 10 10' may be disposed on the same substrate 12' upon which the microelectronics 26 30 are located. Still further, it is contemplated that the structure 10 10' for containing desiccant 20 may be disposed on a substrate 12 that is positioned at an angle from the substrate 12' having microelectronics 26 30 thereon. Therefore, the structure 10 10' for containing desiccant 20 may advantageously be used in wafer-level packaging as well as in die-level packaging.

[0049] Embodiments of the present invention provide many advantages, examples of which include, but are not limited to the following. Embodiment(s) of the present invention generally advantageously result in an enclosed desiccant 20 material, thus keeping the desiccant 20 material substantially separate from the microelectronics 26 30. Further, without being bound to any theory, it is believed that the flexible porous membrane 22 32 advantageously deforms to allow volume expansion as moisture is absorbed into the desiccant 20 and to shrink as moisture is expelled from the desiccant 20. Still further, embodiment(s) of the structure 10 10' may generally advantageously provide an equipotential cage/region surrounding the desiccant 20 thus substantially removing one of the driving forces for mobile ion migration and advantageously protecting the microelectronics 26 30 from degradation and destruction.

[0050] While several embodiments have been described in detail, it will be apparent to those skilled in the art that the disclosed embodiments may be modified. Therefore, the foregoing description is to be considered exemplary rather than limiting.


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